A Complete Toolbox for Edge AI Development
Through our Edge AI platform, COLIGO, HACARUS provides customers with a wide range of applications and services for tailor-made development, including implementations for IoT, FPGA and other edge use cases.
Our technology works with minimal effort for set-up and unlike deep learning based solutions, COLIGO does not need an external training cycle or manual installation of pre-trained models. COLIGO supports both time series data and image data, and training & inference runs within the chip – without the need for external cloud connection.
Supported Use Cases
Super Resolution
Data Reconstruction
Anomaly Detection
COLIGO for FPGA
INTEGRATION WITH CUSTOMER DESIGN
Our typical engagement path for FPGA development include:
(1) PoC (Proof of Concept) phase – aimed to define the visual inspection target and perform initial feasibility assessments with SPECTRO.
(2) Field test phase – real life tests of COLIGO including both the hardware and software components as well as parameter finetuning on-site
(3) Commercial deployment – delivery and development of final product for customer usage
COLIGO CORE for Xilinx FPGA
VISUAL INSPECTION APPLICATION FOR XILINX
Starter kit for Visual inspection application for Xilinx available, consisting of FPGA board, MIPI camera and serial terminal, and can be used for image collection, as well as learning and inference at the edge. Benefits include, no cloud connection required, minimal power consumption and capabilities for true edge AI.
COLIGO CORE for Intel FPGA
COLIGO CORE for Intel® FPGA
COLIGO CORE for Intel® FPGA includes an implementation of HACRUS’ propriety SC (Sparse Coding) algorithm for all Intel Arria® 10 FPGA boards with access to DDR Memory. The SC algorithm generates a sparse representation (i.e. sparse code) of an input data, which when used together with a preset dictionary enables data reconstruction. Necessary access to external memory is provided through an Avalon® MM interface. Having taken advantage of the pipeline-parallel execution approach with the Intel® HLS (High Level Synthesis) compiler, boost in performance is realized. Due to HACARUS’ SC algorithm’s efficient resource usage, experiments on the Intel Arria® 10 indicates that the implementation would also be compatible with low-end FPGA devices, and as such effective for usage even with low performance / cost-sensitive applications.
COLIGO & SPECTRO for congatec
AI STARTER KIT FOR CONGATEC
AI starter kit based on congatec hardware and Hacarus software can instantly be deployed and tested in any GigE and USB 3.x environment. Designed on the basis of palm sized Computer-on-Modules, the system measures only 173 x 88 x 21.7 mm (6.81 x 3.46 x 0.85 in).
It is not only slim but also offers extraordinary performance thanks to the latest Intel Atom® and Celeron®processors (Codename Apollo Lake) that are all available for series production today. Despite its small size, the system has a rich set of I/Os, enabling many different end user setups. Standard interfaces are 2 x GbE application ready for GigE Vison, 1 x USB3.0/2.0, 4 x USB2.0 and 1 x UART (RS-232). Extensions are possible with 2 x Mini-PCIe with USIM socket, 1 x mSATA socket and 16-bit programmable GPIO. The wide range DC voltage input is 9V-32V.